Embodiments of the present invention relate to a wafer and a method of dicing a wafer, and in particular, to a method that drastically reduces a scribe-line width of silicon semiconductor wafers. This is especially needed in modern chip production in order to maximize the silicon utilization of semiconductor wafers so that the wafer can accommodate a maximum possible number of chips. This is especially relevant for flash or smart power products, logic products, memory products, etc.
Before embodiments of the present invention are explained in more detail below with reference to the drawings, it is to be noted that equal elements, or those operating in an equal way are provided with same or similar reference numerals in the figures, and that a repeated description of these elements is omitted.